PIC18F4450T-I/ML【PDF 71/241 页】IC PIC MCU FLASH 8KX16 44QFN

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Sheet目录3872

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162

XMEGA A [MANUAL]

8077I–AVR–11/2012

N represents the prescaler divider used. The waveform generated will have a maximum frequency of half of the

peripheral clock frequency (fclkPER) when CCA is set to zero (0x0000) and no prescaling is used. This also applies when

using the hi-res extension, since this increases the resolution and not the frequency.

14.8.5 Port Override for Waveform Generation

To make the waveform generation available on the port pins, the corresponding port pin direction must be set as output.

The timer/counter will override the port pin values when the CC channel is enabled (CCENx) and a waveform generation

mode is selected.

Figure 14-17 on page 162 shows the port override for a timer/counter. The timer/counter CC channel will override the

port pin output value (OUT) on the corresponding port pin. Enabling inverted I/O on the port pin (INVEN) inverts the

corresponding WG output.

Figure 14-17.Port override for timer/counter 0 and 1.

14.9

Interrupts and events

The timer/counter can generate both interrupts and events. The counter can generate an interrupt on overflow/underflow,

and each CC channel has a separate interrupt that is used for compare or capture. In addition, an error interrupt can be

generated if any of the CC channels is used for capture and a buffer overflow condition occurs on a capture channel.

Events will be generated for all conditions that can generate interrupts. For details on event generation and available

events, refer to “Event System” on page 67.

14.10 DMA Support

The interrupt flags can be used to trigger DMA transactions. Table 14-2 on page 162 lists the transfer triggers available

from the timer/counter and the DMA action that will clear the transfer trigger. For more details on using DMA, refer to

“DMAC - Direct Memory Access Controller” on page 50.

Table 14-2. DMA request sources.

14.11 Timer/Counter Commands

A set of commands can be given to the timer/counter by software to immediately change the state of the module. These

commands give direct control of the UPDATE, RESTART, and RESET signals.

An update command has the same effect as when an update condition occurs. The update command is ignored if the

lock update bit is set.

OUT

CCExEN

INVEN

OCx

Waveform

Request

Acknowledge

Comment

OVFIF/UNFIF

DMA controller writes to CNT

DMA controller writes to PER

DMA controller writes to PERBUF

ERRIF

N/A

CCxIF

DMA controller access of CCx

DMA controller access of CCxBUF

Input capture operation

Output compare operation

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